? semiconductor components industries, llc, 2011 august, 2011 ? rev. 4 1 publication order number: nl7wb66/d nl7wb66 ultra-small spst analog switch the nl7wb66 is a very low r on dual spst analog switch. r on is 5.0 (typ) at 5.0 v. the device is offered in the very popular low cost us8 package. it is designed as a general purpose dual switch and can be used to switch either analog signals such as audio and video or digital signal such as ttl, cmos, lvds, ecl, or complex digital signals such as qpsk. features ? excellent performance rds on = 5.0 at 5.0 v ? high speed operation: t pd = 0.25 ns (max) at 5.0 v ? 1.65 to 5.5 v operating range ? reduced threshold voltages for lvttl on control pin ? eliminates the need for translators for many applications ? ttl compatibility when v cc is 5.0 v ? can operate with 1.8 v inputs, if v cc is 3.0 ? also meets full cmos specifications ? ultra ? low charge injection = 7.5 pc at 5.0 v ? low stand ? by power i cc = 1.0 na (max) at t a = 25 c ? control pins in1, in2, are overvoltage tolerant ? pin for pin replacement tc7wb66, nc7wb66, 74lvc2g66 ? esd protection: machine model >200 v, human body model >2000 v ? latchup max rating: 200 ma ? this is a pb ? free device typical applications ? cell phones ? pdas ? digital still cameras ? video ? digital video 1 2 3 8 7 5 com1 no1 oe2 oe1 v cc no2 4 gnd 6 com2 figure 1. pin assignment diagram see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information marking diagram pin assignment 1 2 3 oe2 no1 gnd 4 5 com1 oe1 6 function table l h on/off enable input state of analog switch off on 7 8 v cc com2 no2 us8 us suffix case 493 8 1 1 8 http://onsemi.com 1 function pin ovt ? ? yes ? ? ? yes ? aj m aj = device code m = date code* = pb ? free package (note: microdot may be in either location) *date code orientation may vary depending upon manufacturing location.
nl7wb66 http://onsemi.com 2 maximum ratings symbol rating value unit v cc dc supply voltage 0.5 to 7.0 v v i dc input voltage 0.5 to 7.0 v v o dc output voltage 0.5 to 7.0 v i ik dc input diode current v i < gnd 50 ma i ok dc output diode current v o < gnd 50 ma i o dc output sink current 50 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature range 65 to 150 c t l lead temperature, 1 mm from case for 10 seconds 260 c t j junction temperature under bias 150 c ja thermal resistance 250 c/w p d power dissipation in still air at 85 c 250 mw msl moisture sensitivity level 1 ? f r flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in ? v esd esd withstand voltage human body model (note 2) machine model (note 3) charged device model (note 4) > 2000 > 200 n/a v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. measured with minimum pad spacing on an fr4 board, using 10 mm ? by ? 1 inch, 2 ? ounce copper trace with no air flow. 2. tested to eia/jesd22 ? a114 ? a. 3. tested to eia/jesd22 ? a115 ? a. 4. tested to jesd22 ? c101 ? a. recommended operating conditions symbol characteristics min max unit v cc positive dc supply voltage 1.65 5.5 v v in digital input voltage (enable) gnd 5.5 v v io static or dynamic voltage across an off switch gnd v cc v v is analog input voltage no com gnd v cc v t a operating temperature range, all package types ? 55 +125 c t r , t f input rise or fall time v cc = 3.3 v + 0.3 v (enable input) v cc = 5.0 v + 0.5 v 0 0 100 20 ns/v
nl7wb66 http://onsemi.com 3 device junction temperature vs. time to 0.1% bond failures junction temperature c time, hours time, years 80 90 100 110 1,032,200 419,300 178,700 79,600 117.8 47.9 20.4 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 normalized failure rate 1 1 10 100 1000 failure rate of plastic = ceramic until intermetallics occur figure 2. failure rate vs. time junction temperature time, years t j = 130 c t j = 120 c t j = 110 c t j = 100 c t j = 90 c t j = 80 c dc characteristics ? digital section (voltages referenced to gnd) symbol parameter condition v cc guaranteed max limit unit 25 c ? 40 to 85 c ? 55 to <125 c v ih high ? level input voltage, control input 1.65 to 1.95 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 v cc x 0.65 v cc x 0.7 v cc x 0.7 v cc x 0.7 v cc x 0.65 v cc x 0.7 v cc x 0.7 v cc x 0.7 v cc x 0.65 v cc x 0.7 v cc x 0.7 v cc x 0.7 v v il low ? level input voltage, control input 1.65 to 1.95 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 v cc x 0.35 v cc x 0.3 v cc x 0.3 v cc x 0.3 v cc x 0.35 v cc x 0.3 v cc x 0.3 v cc x 0.3 v cc x 0.35 v cc x 0.3 v cc x 0.3 v cc x 0.3 v i in maximum input leakage current, enable inputs v in = 5.5 v or gnd 0 v to 5.5 v + 0.1 + 1.0 + 1.0 a i cc maximum quiescent supply current (per package) enable and vis = vcc or gnd 5.5 1.0 1.0 2.0 a
nl7wb66 http://onsemi.com 4 dc electrical characteristics ? analog section symbol parameter condition v cc guaranteed max limit unit 25 c ? 40 to 85 c ? 55 to <125 c r on on ? state switch resistance v is = v cc i s = 4 ma v is = gnd i s = 4 ma v is = v cc i s = 8 ma v is = gnd i s = 8 ma v is = v cc i s = 24 ma v is = gnd i s = 24 ma v is = v cc i s = 32 ma v is = 2.4 i s = 15 ma v is = gnd i s = 32 ma 1.65 1.65 2.3 2.3 3.0 3.0 4.5 4.5 4.5 30 15 20 10 15 7.0 10 8.0 5.0 30 15 20 10 15 7.0 10 8.0 5.0 30 15 20 10 15 7.0 10 8.0 5.0 r on(p) peak on ? state resistance v is = v cc to gnd, i s = 4 ma v in = v ih i s = 8 ma i s = 24 ma i s = 32 ma 1.65 2.3 3.0 4.5 120 30 20 15 120 30 20 15 120 30 20 15 r on difference of on ? state resistance between switches v is = v cc to gnd, i s = 4 ma v in = v ih i s = 8 ma i s = 24 ma i s = 32 ma 1.65 2.3 3.0 4.5 1.2 1.3 1.5 2.0 1.2 1.3 1.5 2.0 1.2 1.3 1.5 2.0 r flat v is = v cc to gnd i s = 4 ma i s = 8 ma i s = 24 ma i s = 32 ma 1.65 2.3 3.0 4.5 240 60 14 5.0 240 60 14 5.0 240 60 14 5.0 i no(off) off leakage current v in = v il v no = 1.0 v, v com = 4.5 v or v com = 1.0 v and v no 4.5 v 5.5 1.0 10 100 na i com(off) off leakage current v in = v il v no = 4.5 v or 1.0 v v com = 1.0 v or 4.5 v 5.5 1.0 10 100 na ac electrical characteristics (input t r = t f = 3.0 ns) symbol parameter test conditions guaranteed max limit unit v cc = 1.8 v 0.15 v v cc = 2.5 v 0.2 v v cc = 3.3 v 0.3 v v cc = 5.0 v 0.5 v min max min max min max min max t on output enable time 2.3 10 1.6 5.6 1.5 4.4 1.3 3.9 ns t off output disable time 2.5 10.5 1.2 6.9 2.0 7.2 1.1 6.3 ns t pd propagation delay time ? 0.55 ? 0.5 ? 0.35 ? 0.25 ns typical @ 25 c, v cc = 5.0 v unit c in c no1 or c no2 c com(off) c com(on) maximum input capacitance, select input analog i/o (switch off) common i/o (switch off) feed ? through (switch off) 3.0 10 10 10 pf
nl7wb66 http://onsemi.com 5 additional applications characteristics (voltage reference to gnd unless noted) symbol parameter condition v cc (v) typical 25 c unit bw maximum on ? channel ? 3.0 db bandwidth or minimum frequency response v is = 0 dbm v is centered between v cc and gnd 2.0 3.0 4.5 102 180 186 mhz v onl maximum feed ? through on loss v is = 0 dbm @ 10 khz v is centered between v cc and gnd 2.0 3.0 4.5 ? 2.2 ? 0.8 ? 0.4 db v iso off ? channel isolation f = 100 khz v is = 1.0 v rms v is centered between v cc and gnd 2.0 3.0 4.5 ? 73 ? 74 ? 75 db q charge injection enable input to common i/o v is = v cc to gnd, f is = 20 khz t r = t f = 3.0 ns r is = 0 , c l = 100 pf 3.0 5.5 4.8 7.5 pc thd total harmonic distortion tdh + noise f is = 10 hz to 100 khz, r l = r gen = 600 , c l = 50 pf v is = 3.0 v pp sine wave v is = 5.0 v pp sine wave 3.0 5.5 0.19 0.06 % device ordering information device order number device nomenclature package type tape and reel size circuit indicator technology device function package suffix nl7wb66usg nl as 2066 us us8 (pb ? free) 178 mm (7 ) 3000 units / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
nl7wb66 http://onsemi.com 6 10% 10% 50% 50% 0 v input output v cc v ol com dut no input 35 pf 90% 90% 50% 50% 0 v input output 35 pf com input no dut figure 3. t on /t off t on t off v oh v cc figure 4. t on /t off v cc t on t off 300 v ol v out v oh v cc 300 v out 0.1 f timing information channel switch control/s test socket is normalized. off isolation is measured across an off channel. on loss is the bandwidth of an on switch. v iso , bandwidth and v onl are independent of the input signal direction. v iso = off channel isolation = 20 log for v in at 100 khz v onl = on channel loss = 20 log for v in at 100 khz to 50 mhz bandwidth (bw) = the frequency 3 db below v onl no dut com 50 50 generator reference transmitted figure 5. off channel isolation/on channel loss (bw)/crosstalk (on channel to off channel)/v onl v out v in v out v in off on off v out v cc gnd output v in c l dut figure 6. charge injection: (q) v in no com
nl7wb66 http://onsemi.com 7 package dimensions us8 us suffix case 493 ? 02 issue b mm inches scale 8:1 0.38 0.015 0.50 0.0197 1.0 0.0394 0.30 0.012 1.8 0.07 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* dim a min max min max inches 1.90 2.10 0.075 0.083 millimeters b 2.20 2.40 0.087 0.094 c 0.60 0.90 0.024 0.035 d 0.17 0.25 0.007 0.010 f 0.20 0.35 0.008 0.014 g 0.50 bsc 0.020 bsc h 0.40 ref 0.016 ref j 0.10 0.18 0.004 0.007 k 0.00 0.10 0.000 0.004 l 3.00 3.20 0.118 0.126 m 0 6 0 6 n 5 10 5 10 p 0.23 0.34 0.010 0.013 r 0.23 0.33 0.009 0.013 s 0.37 0.47 0.015 0.019 u 0.60 0.80 0.024 0.031 v 0.12 bsc 0.005 bsc notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters. 3. dimension ?a? does not include mold flash, protrusion or gate burr. mold flash. protrusion and gate burr shall not exceed 0.140 mm (0.0055?) per side. 4. dimension ?b? does not include inter ? lead flash or protrusion. inter ? lead flash and protrusion shall not e3xceed 0.140 (0.0055?) per side. 5. lead finish is solder plating with thickness of 0.0076 ? 0.0203 mm. (300 ? 800 ?). 6. all tolerance unless otherwise specified 0.0508 (0.0002 ?). l b a p g 4 1 5 8 c k d seating j s r u detail e v f h n r 0.10 typ m ? y ? ? x ? ? t ? detail e t m 0.10 (0.004) xy t 0.10 (0.004) plane dim a min max min max inches 1.90 2.10 0.075 0.083 millimeters b 2.20 2.40 0.087 0.094 c 0.60 0.90 0.024 0.035 d 0.17 0.25 0.007 0.010 f 0.20 0.35 0.008 0.014 g 0.50 bsc 0.020 bsc h 0.40 ref 0.016 ref j 0.10 0.18 0.004 0.007 k 0.00 0.10 0.000 0.004 l 3.00 3.20 0.118 0.126 m 0 6 0 6 n 5 10 5 10 p 0.23 0.34 0.010 0.013 r 0.23 0.33 0.009 0.013 s 0.37 0.47 0.015 0.019 u 0.60 0.80 0.024 0.031 v 0.12 bsc 0.005 bsc notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters. 3. dimension ?a? does not include mold flash, protrusion or gate burr. mold flash. protrusion and gate burr shall not exceed 0.140 mm (0.0055?) per side. 4. dimension ?b? does not include inter ? lead flash or protrusion. inter ? lead flash and protrusion shall not e3xceed 0.140 (0.0055?) per side. 5. lead finish is solder plating with thickness of 0.0076 ? 0.0203 mm. (300 ? 800 ?). 6. all tolerance unless otherwise specified 0.0508 (0.0002 ?). l b a p g 4 1 5 8 c k d seating j s r u detail e v f h n r 0.10 typ m ? y ? ? x ? ? t ? detail e t m 0.10 (0.004) xy t 0.10 (0.004) plane on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. nl7wb66/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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